Cadence Acquires Jasper, Broadens Verification Capabilities




Cadence Design Systems, Inc., a leading provider of global electronic design innovation, recently acquired Jasper Design Automation, Inc., a leading provider of formal analysis solutions, for approximately $170 million in cash (about $140 million excluding Jasper’s cash on hand). Customers use Cadence electronic design automation (EDA) software, hardware, IP, and services to design and verify advanced semiconductors/integrated circuits, consumer electronics, networking and telecommunications equipment, and computer systems.
 
On the electronic design side, Jasper is a market and technology leader in the fast-growing formal analysis sector, providing multiple verification solutions (Verification Apps) built on the JasperGold platform. The vendor provides packaged test suites that are similar to regression suites in software and to integration between suites. With increased use of complex printed circuit board (PCB) systems, the integration points/compatibility between systems is critical. Unlike ad hoc or manual run tests, these systems provide standard tests with automation, which should be a real big value for designers.
 
Jasper’s customers include many of the top system, semiconductor, and IP companies. These companies, many of which are also Cadence customers, are increasingly adopting formal analysis to complement traditional verification methods to better address the challenge of verifying increasingly complex and flexible IP designs and systems-on-chip (SoCs). With verification representing over 70 percent of the cost of developing an SoC, it has become the top system and SoC development challenge and is the critical factor for time-to-market.
 
The complementary combination will expand the differentiation of Cadence’s dynamic system verification platform, and will be tightly integrated with Cadence’s common debug analysis; formal and semi-formal solutions; and simulation, acceleration, emulation, and prototyping platforms, while leveraging its unified verification planning and metric-driven verification flow. Jasper competes against Cadence’s archrival Synopsys, which offers its Magellan formal analysis product.
 
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